So, rev 2 was implemented...? What's going on now...?
Great! Off to the races again. Well, as can be seen from the main image of this blog posting, there is a dangling net feeding into one of the NAND gate inputs...
I had already submitted my gerbers to OSH Park a few days prior and gotten a response that the panels had been sent to the fabricator. As I saw this in the KiCAD's eeschema, I was thinking "wait did I accidentally delete this net before or after I completed the design changes? I ran the ERC didn't I? I don't remember getting any errors...? Hmmm... Let me check the layout. Oh no... :( GP0 has a trace to the pullup, but that net didn't get tied to the NAND input!"
Tracing back my design flow migrating from rev 1 to rev 2, I had made use of an internally-bussed resistor network for the pullup resistors. Everything was good in the rev 2 schematic, however when I got down to the final few PCB trace routes, it was going to greatly simplify the layout if I could swap, or reverse, 4 of the pins on the resistor network. In other EDA packages I've used in the past (Mentor Graphics Pads, and even EagleCAD) there is a handy feature called "Swap pins" commonly used for logic gates and various other parts for doing just this. Well KiCAD is behind the ball on this one, or at least I didn't see this feature, so I did it the manual way - go back to the schematic, make the changes, and then push these back through to the layout through the netlist. Well, in doing this, I apparently severed the net shown in the pic and didn't see it to reconnect it. Nor, apparently, did I re-run the ERC in eeschema or it would have caught this.
So going from this (below left) ......................................to this (below right)...
Regarding firmware, I did complete a first draft of an Arduino library for the MCP23S08 with several example sketches highlighting various library functions/methods. Download it here. Yet to be tested functionality is the interrupt capability of the IO expander, which is not utilized in this board design, so very low priority on this. However, provisions were made in the layout for adding a fly wire to the interrupt pin purely for experimentation of the MCP23S08 alone and in no way related to the memory functionality of the board.
Hopefully soon to come is the next layer of firmware which makes the multiple chips accessible as one continuous array of memory to the application (the "sketch" in the case of the Arduino platform).